References
[1] Cyril Prasanna Raj P & S.L. Pinnae “DESIGN AND ANALOG VLSI IMPLEMENTATION OF NEURAL NETWORK ARCHITECTURE FOR SIGNAL PROCESSING” European Journal of Scientific Research ISSN 1450-216X Vol.27No.2 (2009), pp.199-216
[2] George Papadourakis “INTRODUCTION TO NEURAL NETWORKS” (2009)
[3] Anita Wasilewska “NEURAL NETWORKS” State University of New York at Stony Brook.
[4] Ranjeet Ranade & Sanjay Bhandari & A.N. Chandorkar “VLSI Implementation of Artificial Neural Digital Multiplier and Adder” pp.318-319
[5] Rafid Ahmed Khalil & Sa`ad Ahmed Al-Kazzaz “Digital Hardware Implementation of Artificial Neurons Models Using FPGA”pp.12-24
[6] Bose N.K., Liang P., Neural Network Fundamentals With graphs, algorithms and Application, Tata McGraw hill, New Delhi, 2002,ISBN0-07-463529-8.
[7] Razavi Behzad, Design of Analog CMOS Integrated Circuits, Tata McGraw hill, New Delhi , 2002, ISBN0-07-052903-5.
[8] Roy Ludvig Sigvartsen, An Analog Neural Network With On-Chip Learning Thesis Department of informatics, University of Oslo, 1994
[9] Isik Aybayetal , Classification of Neural Network Hardware, Neural Network World ,IDG Co., Vol6 No1, 1996, pp.11-29 ,
[10] Vincent F. Koosh Analog Computation and Learning in VLSI PhD thesis California institute of technology, Pasadena, California.2001.
[11] E. Vittoz, et al.,” The design of high performance analog circuits on digital CMOS chips,” IEEE J. Solid State Circuit 20, 1985, pp.657-665
[12] S. Orcioni G. Biagetti, M. Conti, “A mixed signal fuzzy controller using current model circuits, “ Analog Integrated Circuits Process. 38, 2004 , pp.215-231.
[13] F. Djeffal et al., “Design and Simulation of Nanoelectronic DG MOSFET Current Source using Artificial Neural Networks,” Materials Science and Engineering C, vol. 27, 2007, pp. 1111-1116
[14] H. Ben Hommounda et al., “Neural Based Models Of Semiconductor Devices for Spice Simulator,”American J. of Applied Science, vol. 5, 2008, pp. 385-391
[15] Arne Heittmann, “An Analog VLSI Pulsed Neural Network for Image Segmentation using Adaptive Connection Weights” Dresden University of Technology, Department of Electrical Engineering and Information Technology,Dresden, Germany, 2000
[16] Wai-Chi Fang et al, “A VLSI Neural Processor for Image Data Compression using Self-Organisation Networks” IEEE Transactions on Neural Networks, Vol. 3, No. 3, May 1992, pp. 506-517
[17] R. Rojas, Neural Networks, Springer-Verlag, Berlin, 1996
[18] D. Nguyen a and B. Wid row, Improving the learning speed of 2-layer neural network by choosing initial values of the adaptive weights, IEEE First International Joint Conference on Neural Networks , 3, 21–26, (1990).
[19] R.A. Jacobs, Increased rates of convergence through learning rate adaptat ion , Neural Networks , 1 , 295–307, (1988).
[20] T. P. Vogl, J. K. Man gis, J.K. Rigler, W. T. Z ink and D .L. Alkon, Accelerating the convergence of the back-propagation method , Biological Cyberne tics, 59 , 257–263,(1988).